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IEEE ITC India 2025 Drives Innovation in Semiconductor Testing & Validation
Industry News- Jul 25,25
The 9th IEEE International Test Conference (ITC) India 2025 showcased advancements in semiconductor testing, with global leaders like Caliber Interconnects, Siemens, and Qualcomm discussing industry innovations.
Bengaluru
The 9th IEEE International Test Conference India (ITC India 2025) – held from July 20-22, 2025 in Bengaluru - concluded on a high note. The event reaffirmed its significance as a strategic platform for advancing India’s semiconductor ecosystem, highlighting the nation’s growing role in the global industry.
The conference brought together hundreds of professionals from across the industry and academia, focusing on the latest advancements in semiconductor testing, validation, simulation, and system-level reliability. This year’s edition featured global speakers, technical tracks, panel discussions, and live showcases, acting as a vital bridge between research, application, and industry demand.
ITC India 2025 was supported by leading technology firms such as Caliber Interconnects, Siemens, Tessolve, Google, Cadence, Synopsys, Qualcomm, DeFT, Soliton, Anora, Mirafra, Advantest, and Maven Silicon. The event created a dynamic environment for learning, networking, and collaboration, with exhibitors demonstrating a variety of products spanning AI-enabled test automation, advanced DFT methodologies, post-silicon validation tools, yield optimization, and system reliability solutions.
The conference, backed by the IEEE Bangalore Section along with IESA, VLSI Society, and other partners, saw increased participation and positive feedback, with attendees commenting on the event’s larger turnout, richer content, and enhanced peer engagement compared to prior years.
A standout moment was the keynote delivered by Suresh Babu K, Managing Director of Caliber Interconnect Solutions, titled “From Silicon to Solutions: The Societal Impact of Semiconductor Leadership.” His address mapped out the semiconductor industry’s future, focusing on:
- India’s rising role in the global semiconductor mission
- Time-to-market acceleration and quality assurance as competitive advantages
- The challenges of test scalability
- The evolution of testing from design to validation
- Strategic priorities for innovation and self-reliance through ecosystem collaboration
Babu K also emphasised that India’s engineering services companies must continuously adapt to shifting technology trends across product lifecycles, highlighting the growing job opportunities in the semiconductor test ecosystem.
“We are prepared to offer design-to-validation solutions that will shape India’s contribution to the global semiconductor value chain,” said Babu K, urging stronger collaboration between industry, startups, and academia.
Global thought leaders at the forefront of innovation
Additional keynote speakers included:
- “The Right Testing Strategy Can Save Designs” by Nitza Basoco, Teradyne
- “Rethinking Silicon Test to Reduce DPPM and SDC” by Dr. Sreejit Chakravarty, IEEE Fellow & Distinguished Engineer, Ampere Computing (USA)
- “Transformative Design-for-Test Technologies for Silicon Lifecycle Management” by Janusz Rajski, Siemens EDA
- “The Future of AI Hardware Enabled by Advanced Packaging” by Raja Swaminathan, AMD (USA)
- “Enabling Efficient Prototyping for Fabless Design Houses” by Rajesh V, Senior VP – Test & Product Engineering, Tessolve (India)
These sessions underscored the role of innovation in reducing test escape rates, improving yield predictability, and ensuring robustness in next-generation chips. As AI, edge computing, and automotive electronics demand more complex test coverage, these advancements are crucial.
Strengthening India’s semiconductor future
The conference fostered cross-disciplinary discussions around:
- AI/ML in test analytics
- Secure test infrastructures for hardware IP
- EDA-cloud synergy for scalable simulation
- Prototyping efficiency for fabless startups
As India moves closer to becoming a global semiconductor hub, IEEE ITC India 2025 has proven to be a crucial enabler, connecting visionaries, technologists, and innovators defining the future of silicon reliability and performance.
IEEE International Test Conference
Semiconductor Testing
Caliber Interconnects
Suresh Babu K
Industry 4.0
AI in Semiconductor
Tessolve
Bengaluru Semiconductor Conference
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